Currently, the predominant ways for electrically connecting semiconductor devices to substrates are through wire bonding and through solder bumps as in flip chip packages. Wire bonding while being straightforward has the limitation of low hourly based unit manufacturability. Loop like wire structures form resulting in wire sweep problems during molding. Also, spacing requirements and the overall package height increase for the die stack. With the ever increasing demand for small, light weight personal electronics devices like cellular phones, PDA's, audio entertainment devices and mobile games, the ability to reduce the thickness and price of electronic packaging is essential.
Thus, a need still remains for a highly reliable and high volume manufacturing solution for integrated circuit packaging. In view of the ever-increasing need to save cost and improve efficiencies, it is increasingly critical that answers be found to these problems. Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.